STM32H7A3RIT6

STM32H7A3RIT6 Description

The high-performance Arm? Cortex?-M7 32-bit RISC CPU used in the STM32H7A3RIT6 chip operates at up to 280 MHz. The Arm? double-precision (IEEE 754 compliant) and single-precision data-processing instructions and data formats are supported by the Cortex?-M7 core's floating point unit (FPU). The memory protection unit (MPU) and the entire set of DSP instructions are supported by STM32H7A3xI/G devices to increase application security.

High-speed embedded memories are included in the STM32H7A3RIT6 device, including dual-bank Flash memory with up to 2 Mbytes of capacity, approximately 1.4 Mbyte of RAM (including 192 Kbytes of TCM RAM, 1.18 Mbytes of user SRAM, and 4 Kbytes of backup SRAM), as well as a wide variety of enhanced I/Os and peripherals connected to four APB buses, three AHB buses, a 32-bit multi-AHB bus matrix and a multi-layer AXI interconnect supporting internal and external memory access.

A real random number generator, 12 general-purpose 16-bit timers, two PWM timers for motor control, two dual and one single DAC, two ultra-low-power comparators, a low-power RTC, and two ADCs are all included in the devices (RNG). Nine digital filters for external sigma delta modulators are supported by the devices (DFSDM). They also have both conventional and cutting-edge communication interfaces.

STM32H7A3RIT6 Features

Security

• ROP, PC-ROP, active tamper, secure firmware upgrade support

General-purpose input/outputs

• Up to 168 I/O ports with interrupt capability

– Fast I/Os capable of up to 133 MHz

– Up to 164 5-V-tolerant I/Os

Low-power consumption

• Stop: down to 32 μA with full RAM retention

• Standby: 2.8 μA (Backup SRAM OFF, RTC/LSE ON, PDR OFF)

• VBAT: 0.8 μA (RTC and LSE ON)

Clock management

• Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI

• External oscillators: 4-50 MHz HSE, 32.768 kHz LSE

• 3× PLLs (1 for the system clock, 2 for kernel clocks) with fractional mode

Core

• 32-bit Arm? Cortex?-M7 core with double-precision FPU and L1 cache: 16 Kbytes of data and 16 Kbytes of instruction cache allowing to fill one cache line in a single access from the 128-bit embedded Flash memory; frequency up to 280 MHz, MPU, 599 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions

Memories

• Up to 2 Mbytes of Flash memory with read while write support, plus 1 Kbyte of OTP memory

• ~1.4 Mbytes of RAM: 192 Kbytes of TCM RAM (inc. 64 Kbytes of ITCM RAM + 128 Kbytes of DTCM RAM for time critical routines), 1.18 Mbytes of user SRAM, and 4 Kbytes of SRAM in Backup domain

• 2x Octo-SPI memory interfaces, I/O multiplexing and support for serial PSRAM/NOR, Hyper RAM/Flash frame formats, running up to 140 MHz in SRD mode and up to 110 MHz in DTR mode

• Flexible external memory controller with up to 32-bit data bus:

– SRAM, PSRAM, NOR Flash memory clocked up to 125 MHz in Synchronous mode

– SDRAM/LPSDR SDRAM

– 8/16-bit NAND Flash memories

• CRC calculation unit

STM32H7A3RIT6 Applications

• Alarm systems, video intercom, and HVAC

• Home audio appliances

• Mobile applications, Internet of Things

• Wearable devices: smart watches

• Motor drive and application control

• Medical equipment

• Industrial applications: PLC, inverters, circuit breakers

• Printers, and scanners